Update: Intel Accelerated Ireland EUV Fab Ramp-Up as Meteor Lake Chips Were In Short Supply
by Ryan Smith on August 1, 2024 8:15 PM EST- Posted in
- CPUs
- Intel
- Meteor Lake
- Intel 4
Update 08/02: Patrick Moorhead has published a further tweet, clarifying that "Pat [Gelsinger] didn’t tell me l that there were yield issues. This was *my* interpretation." The text of the article has been updated accordingly to reflect this tweet, as well as Intel statements about accelerating their Ireland Fab 34 ramp-up.
Alongside Intel’s weak Q2 2024 earnings report and the announcement of $10 billion in spending cuts and layoffs for 2025, the company is also disclosing some new information about their chip deliveries over the first half of the year. A brief report, posted on X by analyst Patrick Moorhead and citing a conversation with Intel CEO Pat Gelsinger, revealed that Intel encountered a major production bottleneck on Meteor Lake earlier this year. The issue was significant enough to drive intel to take the extraordinary and costly step of accelerating their Ireland fab ramp-up in order to improve chip capacity.
It was a very rough Q2 for $INTC. And that guide... Thanks, @Pgelsinger, for the time to discuss.
— Patrick Moorhead (@PatrickMoorhead) August 1, 2024
It appears that there were yield/throughput issues on Meteor Lake, negatively impacting gross margins. When you have to get the product to your customers, and you have wafers to… pic.twitter.com/pHU66xvFe7
-Patrick Moorhead
In a separate tweet posted several hours later, Moorhead then clarified that the yield issues mentioned in his first tweet were his interpretation of the matter, rather than something Pat Gelsinger had told him directly.
-Patrick Moorhead
Decoding Moorhead’s dense tweets, fundamentally, Moorhead is questioning why Intel's Cost of Goods Sold (COGS) – how much the company's chips cost to produce – were on the rise with the launch of Meteor Lake. The analyst surmised that yields and/or some other unexpected production bottleneck must be the case, as these are the typical issues that drive up chip COGS on a short-term basis like Intel has been experiencing.
And, judging from Intel's earnings call that took place after the initial tweet, Moorhead was right to an extent. Referencing the increased COGS, Intel CFO David Zinsner noted that Intel opted to ramp up its high-volume production in Ireland faster than initially planned. This increased Intel's capacity for Intel 4 (and Intel 3) capacity, but doing so also increased their costs, as wafers out of Ireland cost more in the near term.
-Intel CFO David Zinsner (Intel Q2'24 Earnings Call)
Between Moorhead's report that OEMs have been receiving fewer Meteor Lake chips than they could use, and Intel's announcement that they accelerated the Ireland fab ramp-up, this is the first significant disclosure that Meteor Lake chips were, at least at some point, in unexpectedly short supply. Which in turn required Intel to take unexpected and extraordinary steps in order to improve chip production, at the cost of lower short-term profit margins and higher COGS.
The first of Intel's high-volume manufacturing (HVM) fabs to be equipped for the Intel 4 and Intel 3 processes, Fab 34 in Ireland is a critical element to Intel's cutting-edge product plans over the next couple years. Intel was not initially planning on relying so much on Fab 34 this soon – instead using their Oregon development fabs to do more of their Intel 4 & Intel 3 fabrication – but the company opted to ramp up at a faster pace. The benefit to Intel is that they get more fab capacity sooner, but it means they're incurring around $1 billion in costs now of what would have otherwise been spread out over further quarters during a more gradual ramp-up.
The net result was that, while Intel took a margin hit, it also allowed them to supply more Meteor Lake chips than they otherwise would have, even beating their own previous projections for Q2 shipments. Overall, Intel reported in their Q2 earnings that they’ve shipped 15 million “AI PC” chips since Meteor Lake’s launch, though the company doesn't break down how many of those were in Q2 versus Q1 and Q4'23. Still, according to Moorhead, this was fewer chips than OEMs would have liked to have, and they would have taken more chips if they were available.
COGS and Ireland ramp-ups aside, Moorhead also posits that some of Intel's capacity boost came from running “hot lots” of Meteor Lake – high priority wafer batches that get moved to the front of the line in order to be processed as soon as possible (or as reasonably close as is practical). Hot lots are typically used to get highly-demanded chips produced quickly, getting them through a fab sooner than the normal process would take. As a business tool, hot lots are a fact of life of chip production, but they’re undesirable because in most cases they cause disruptions to other wafers that are waiting their turn to be processed.
If true, running hot lots of Meteor Lake would be a significant development given the potential disruptions. At the same time, however, the situation with Meteor Lake is somewhat particular, as the Intel 4 process used for Meteor Lake’s compute tile (the only active tile made at Intel) is not offered to external foundry customers, or even used by other Intel CPUs (Xeon 6s all use Intel 3). So hot lots of Meteor Lake would have few other wafers to even jump ahead of for EUV tooling (Intel would certainly not put them ahead of high-margin Xeon products), while it's unclear how this would cascade down to any tools shared with Intel 7.
Intel, for their part, did not comment on Meteor Lake chip yields or hot lots in their earnings call.
In any case, Intel at this point is looking to turn around their troubled fortunes in the second half of this year. The company’s next-gen client SoC for mobile, Lunar Lake, is set to launch on September 3rd. And notably, both of its active tiles are being built by TSMC. So Lunar Lake would be spared from any Intel logic fab bottlenecks, though it still has to go through Intel’s facilities for assembly using their Foveros technology. And there remains the thorny issue of higher production costs altogether, since Intel is paying for what's effectively the fully outsourced production of a Core CPU.
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Exotica - Thursday, August 1, 2024 - link
So in other words Intel supply of meteor lake couldn’t keep up with demand ? So meteor lake isn’t as bad as some people have made it out to be ?boozed - Thursday, August 1, 2024 - link
Come on you didn't really comment without even reading the headline, surely?TristanSDX - Friday, August 2, 2024 - link
seems that Intel 4 node is not mature, have low yield (typical for not mature node), and require more wafers for planned output. How mature will be other processes like Intel 3, 20A and 18A. Pat vision 5N4Y is rushed, and may create other problems with CPU reliability.sharath.naik - Friday, August 2, 2024 - link
It isn't bad, just that it isn't good compared to what AMD had with ZEN4. The reason is simple, Zen4 is on 4NM while intel 4 is misleading name as it is really 7nm. There is no way for them to match AMD efficiency with performance per watt with meteor lake. Meteor lake efficiency is closer to 5-3 year old ZEN3 on 7nm-6nm.But lunar lake will change all that. It will be their first chance for their engineering to see its true potential. I am going to bet it will be far ahead of qualcomm and AMD in performance per watt. And even more in battery life for laptops. they should really come close to APPLE with this.
name99 - Friday, August 2, 2024 - link
[IMG]https://media.tenor.com/ykSYWwbklz8AAAAM/this-time...
[/IMG]
boozed - Thursday, August 1, 2024 - link
What's the difference in lead time between a "hot lot" and a regular (room temperature?) production run?meacupla - Friday, August 2, 2024 - link
read the 3rd paragraphboozed - Saturday, August 3, 2024 - link
This one?"Decoding Moorhead’s dense tweets, fundamentally, Moorhead is questioning why Intel's Cost of Goods Sold (COGS) – how much the company's chips cost to produce – were on the rise with the launch of Meteor Lake. The analyst surmised that yields and/or some other unexpected production bottleneck must be the case, as these are the typical issues that drive up chip COGS on a short-term basis like Intel has been experiencing."
eastcoast_pete - Friday, August 2, 2024 - link
One question is whether the fabbing of Intel 3 (for Xeons) and Intel 4 (for Meteor Lake CPU tiles) use the same scanners and other equipment in Fab 34 (not at the same time, of course). If Intel had to divert capacity from making Xeons to making more Meteor Lakes, it would have indeed hit their bottom line, as server CPUs are high margin products.The other question is whether the demand from OEMs for Raptor Lake mobile CPUs dropped more precipitously than Intel had predicted. Intuitively, that would make sense to me: if I order an Intel laptop in 2024, I'd want the newest SoC/CPU, not one of the older models. And, unlike the transition from Alder Lake to Raptor Lake, this was not just an evolutionary update.
As for what their yield is, there should be a statement of some sort in Intel's quarterly reports, but likely buried in a footnote.
Lastly, by simple transistor density per square mm, Intel 4 is about where TSMC 4 is, although those comparisons are tricky, as for example L1 caches (SRAM) are not increasing area density the same way as logic does when moving to a better node.
name99 - Friday, August 2, 2024 - link
"Moorhead is questioning why Intel's Cost of Goods Sold (COGS) – how much the company's chips cost to produce – were on the rise with the launch of Meteor Lake."Isn't this explained by the simple fact that chiplet packaging is not free?
Look, I could be wrong here because no-one outside the relevant companies has access to the pricing and yield data. But the point of chiplets initially was
(a) a way to grow beyond the reticle limit (basically how AMD or Apple use them, and what nV will presumably do soon)
(b) a way to move functionality that's not much boosted by new process off to a cheaper process (again AMD). This second scheme is finicky in that you won't come out ahead unless either you can charge more for your chiplet product (ie fold in the packaging costs) OR the disaggregation you choose doesn't require that much chiplet-to-chiplet communication, so you can get away with cheaper packaging.
Intels' embrace of chiplets seems to have nothing to do with either of these and 100% to do with "marketing has told us that chiplets are cool, so let's use them everywhere". Technically their chiplet split doesn't make sense, with the consequence that they need very high end packaging to claw back the power/performance losses of how they chose to disaggregate functionality.
I mean, it wouldn't surprise me if they ARE having yield issues -- and learning why no-one in the past ever promised "5 nodes in 4 years"....
But my suspicion (suspicion, given that we don't know numbers) is that the unforced (and, oh what a surprise, marketing driven -- because Intel is STILL, even after the disasters of the past ten years, PRIMARILY a marketing company) choice of all chiplets everywhere is driving this increased COGS.