"*facepalm* Great articles, but get this man an editor."
Actually he has an editor, who is sheepishly at fault for that typo. I rephrased that sentence and forgot to excise the "that". So it's entirely my own doing...
I recommend Grammarly. It is a system hog, but for content writers, it is a very good tool. It can do contextual checks based on already written sentences too. But I'm sure this comment will get flagged as an advertisement rather than a recommendation.
So when Samsung, Rambus, or whoever talk about 3rd generation HBM, is that just marketing hype or prognostication? At what point do we increment to HBM3 or HBM4?
I assume we will see 16, 24, and 32-Hi stacks within the next 5 years. What is the limit? Can we see 1024-Hi? That's assuming some good post-NAND technology (not 3D XPoint) doesn't come in and wipe the floor with HBM in the meantime.
HBM 3 is a different specification. I guess they are still researching it and a standard has not yet been finalized. So it's neither marketing hype nor prognostication, but rather future plans in the works. As for when it will come around, I have no idea.
Persistent memory technologies tend to be slower than DRAM. The point of HBM is to provide something higher performance than standard DRAM. The part of the market served by HBM will seek to get faster and faster while there is also a separate demand for large capacity, persistent memory with higher performance than NAND. If one technology comes along and fulfills both needs it would be a very strong technology.
Even the best post-NAND tech on the map is maybe within spitting distance of current-gen DDR. Maybe. But GDDR and HBM are another matter entirely, I don't think post-NAND NVRAM is going to be a major threat to volatile graphics memory tech any time soon.
Intel/AMD really need to start selling CPUs with HBM as part of the package, to be used as main memory. 96GB is plenty for the vast majority of the people.
For server applications that need even more memory, they could sell CPUs that use HBM as L4 cache..
96GB of HBM is indeed plenty for the vast majority of people, but the price of a CPU with 96GB of HBM is also above budget for the vast majority of people. Your L4 cache idea, similar to Crystalwell, would probably be a better bet for iGPUs or somesuch.
"Intel/AMD" is ironically the right way to put it: Intel's Kaby Lake G processors with AMD's graphics on-package also include HBM2 memory, but for the graphics processor. Not what you asked for, but... well, close-ish?
I've seen numbers that suggest that HBM2 is ~2-3x the cost of DDR4 for a given capacity, plus ~$25 for the interposer, so you'd probably be looking at $150 (minimum) to add 8GB on package, and a little less than ~$300 for 16GB. On top of that, you'd need a new socket and a low-volume, (therefore) high-cost motherboard. I really wonder if, when all's said and done, those costs would really be worth the extra performance over DDR4. In a given box, you could easily double the RAM and still save money, and for large installs, get substantially more servers for the same cash.
At some point, distance from CPU to RAM will become a big performance (and power) bottleneck. Branch prediction and speculative execution will only get you so far, particularly in these days of side-channel attacks and tight per-core power budgets that are made tighter by power-hungry interconnect fabrics. Meanwhile, ongoing process shrinks, and new transistor designs/materials, will continue ratcheting up the CPU frequencies, further raising the cost of pipeline stalls...
Even if not going with HBM in particular, I can see package-on-package combos of CPU + RAM (with some TSV and/or interposer tech to tie it all together) increasingly becoming a necessity over the next few years. In multi-chiplet CPU/SoC designs that need an interposer anyway, upgrading the interposer to also handle on-package RAM (whether HBM or not) would likely not further raise the cost(s) all that much. And as far as HBM per-bit cost, I suspect it's more an issue of high-volume manufacturing and scale-up. Intrinsically, HBM requires far less packaging and auxiliary chips/circuitry, so should be fundamentally cheaper than DDR4+ RAM on a per-bit basis - if all other factors (such as supply chain scale) were equivalent. Plus, HBM is more power-efficient than DDR, which would allow more power to be allocated to processing, thus further boosting performance.
Over the next few years, I can see HBM completely replacing DDR on all consumer and prosumer-grade devices, with DDR eventually getting relegated to large servers and supercomputers as a "niche" technology. Of course, just because it's possible or even likely (IMHO), doesn't mean it will necessarily happen: ultimately, it's up to the long-term decisions and investments made by the market leaders.
I naturally assume in 7nm Top End GPU, there is going to be a need for higher bandwidth which needs either 512bit GDDR6 or HBM2?
Which one will be cheaper? 512bit memory interface is expensive. When does the line cross and HBM2 becomes a better solution? Or are they still priced far apart?
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ravisurdhar - Wednesday, December 19, 2018 - link
"JEDEC this week published an updated version of its JESD235 specification, which that"*Let me guess, this is by Anton?*
"by Anton Shilov"
*facepalm* Great articles, but get this man an editor.
nandnandnand - Wednesday, December 19, 2018 - link
Anton Shilov is R*ssian (I hope). He needs an editor to check on every article. And I will apply for that job.However, he does cover some of the best topics, even if almost nobody finds 12-Hi HBM s*xy.
p1esk - Thursday, December 20, 2018 - link
I find 96GB HBM sexy...Ryan Smith - Thursday, December 20, 2018 - link
"*facepalm* Great articles, but get this man an editor."Actually he has an editor, who is sheepishly at fault for that typo. I rephrased that sentence and forgot to excise the "that". So it's entirely my own doing...
boeush - Thursday, December 20, 2018 - link
Someone get this editor a grammar-checking tool, pronto! (It's not like MS Word, for instance, has had grammar-checking since, like, 20 years ago...)SeleniumGlow - Friday, December 21, 2018 - link
I recommend Grammarly. It is a system hog, but for content writers, it is a very good tool. It can do contextual checks based on already written sentences too. But I'm sure this comment will get flagged as an advertisement rather than a recommendation.nandnandnand - Wednesday, December 19, 2018 - link
So when Samsung, Rambus, or whoever talk about 3rd generation HBM, is that just marketing hype or prognostication? At what point do we increment to HBM3 or HBM4?I assume we will see 16, 24, and 32-Hi stacks within the next 5 years. What is the limit? Can we see 1024-Hi? That's assuming some good post-NAND technology (not 3D XPoint) doesn't come in and wipe the floor with HBM in the meantime.
Yojimbo - Wednesday, December 19, 2018 - link
HBM 3 is a different specification. I guess they are still researching it and a standard has not yet been finalized. So it's neither marketing hype nor prognostication, but rather future plans in the works. As for when it will come around, I have no idea.Persistent memory technologies tend to be slower than DRAM. The point of HBM is to provide something higher performance than standard DRAM. The part of the market served by HBM will seek to get faster and faster while there is also a separate demand for large capacity, persistent memory with higher performance than NAND. If one technology comes along and fulfills both needs it would be a very strong technology.
Alexvrb - Wednesday, December 19, 2018 - link
Even the best post-NAND tech on the map is maybe within spitting distance of current-gen DDR. Maybe. But GDDR and HBM are another matter entirely, I don't think post-NAND NVRAM is going to be a major threat to volatile graphics memory tech any time soon.vFunct - Thursday, December 20, 2018 - link
Intel/AMD really need to start selling CPUs with HBM as part of the package, to be used as main memory. 96GB is plenty for the vast majority of the people.For server applications that need even more memory, they could sell CPUs that use HBM as L4 cache..
MajGenRelativity - Thursday, December 20, 2018 - link
96GB of HBM is indeed plenty for the vast majority of people, but the price of a CPU with 96GB of HBM is also above budget for the vast majority of people. Your L4 cache idea, similar to Crystalwell, would probably be a better bet for iGPUs or somesuch.sing_electric - Thursday, December 20, 2018 - link
"Intel/AMD" is ironically the right way to put it: Intel's Kaby Lake G processors with AMD's graphics on-package also include HBM2 memory, but for the graphics processor. Not what you asked for, but... well, close-ish?I've seen numbers that suggest that HBM2 is ~2-3x the cost of DDR4 for a given capacity, plus ~$25 for the interposer, so you'd probably be looking at $150 (minimum) to add 8GB on package, and a little less than ~$300 for 16GB. On top of that, you'd need a new socket and a low-volume, (therefore) high-cost motherboard. I really wonder if, when all's said and done, those costs would really be worth the extra performance over DDR4. In a given box, you could easily double the RAM and still save money, and for large installs, get substantially more servers for the same cash.
boeush - Thursday, December 20, 2018 - link
At some point, distance from CPU to RAM will become a big performance (and power) bottleneck. Branch prediction and speculative execution will only get you so far, particularly in these days of side-channel attacks and tight per-core power budgets that are made tighter by power-hungry interconnect fabrics. Meanwhile, ongoing process shrinks, and new transistor designs/materials, will continue ratcheting up the CPU frequencies, further raising the cost of pipeline stalls...Even if not going with HBM in particular, I can see package-on-package combos of CPU + RAM (with some TSV and/or interposer tech to tie it all together) increasingly becoming a necessity over the next few years. In multi-chiplet CPU/SoC designs that need an interposer anyway, upgrading the interposer to also handle on-package RAM (whether HBM or not) would likely not further raise the cost(s) all that much. And as far as HBM per-bit cost, I suspect it's more an issue of high-volume manufacturing and scale-up. Intrinsically, HBM requires far less packaging and auxiliary chips/circuitry, so should be fundamentally cheaper than DDR4+ RAM on a per-bit basis - if all other factors (such as supply chain scale) were equivalent. Plus, HBM is more power-efficient than DDR, which would allow more power to be allocated to processing, thus further boosting performance.
Over the next few years, I can see HBM completely replacing DDR on all consumer and prosumer-grade devices, with DDR eventually getting relegated to large servers and supercomputers as a "niche" technology. Of course, just because it's possible or even likely (IMHO), doesn't mean it will necessarily happen: ultimately, it's up to the long-term decisions and investments made by the market leaders.
iwod - Thursday, December 20, 2018 - link
I naturally assume in 7nm Top End GPU, there is going to be a need for higher bandwidth which needs either 512bit GDDR6 or HBM2?Which one will be cheaper? 512bit memory interface is expensive. When does the line cross and HBM2 becomes a better solution? Or are they still priced far apart?
integracija - Monday, December 31, 2018 - link
https://integracija.tumblr.com/