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  • jeremyshaw - Sunday, August 1, 2021 - link

    Just a curiosity, why would a lab have such posters inside? Are they hoping for engineers passing by to correct mistakes before it's sent out? Morale building?
  • Ian Cutress - Sunday, August 1, 2021 - link

    Executive doing a whirlwind tour, being shown the new technology, and each segment is being presented.
  • jeremyshaw - Sunday, August 1, 2021 - link

    Very nice of the executive team to serve as verified leakers!
  • cakeisalie - Monday, August 2, 2021 - link

    One exec's "leak" is another exec's announcement.
    (The lack of public display of someone who actually worked on a chip's VHDL on the stage of a livestreamed event for example leaves room for playing devil's advocate in pretending that _all_ information, "announcements" and "leaks" likewise, are only ever made by execs.)
  • alfalfacat - Sunday, August 1, 2021 - link

    If you walk into any academic lab, you'll see old poster presentations covering every wall. These were probably made for some internal conference.
  • jeremyshaw - Sunday, August 1, 2021 - link

    I have. We didn't have those types of posters all over the wall, despite many conferences and presentations.
  • jeremyshaw - Sunday, August 1, 2021 - link

    Ohh, I just saw the tone of my post. Sorry. I asked the question, since I haven't seen that style of condensed poster, even for undergrad senior projects. The explanation above of an executive tour makes a lot of sense.
  • sonicmerlin - Sunday, August 1, 2021 - link

    Well this is a cool leak. It looks like they were probably going to reveal TB 5 at an event soon.

    With regards to Pam-3, what exactly is the purpose of transmitting a -1 when bits are either 0 or 1?
  • Ian Cutress - Sunday, August 1, 2021 - link

    As per the table above, you don't read the -1 as a -1. You combine it with the following signal and convert into a 3-bit value, giving you +50% bandwidth over NRZ.
  • Kangal - Tuesday, August 3, 2021 - link

    I've always thought we should be doing this.
    With the way that electricity works (active to/fro), we essentially have a -1, 0, +1 charge to play with for signals. Perhaps we need to evolve future computers, to use three bits instead of two, since we're hitting the limitations of silicon. Whilst PAM-3 is an improvement to current solutions, the act of converting three-bit signal back into our traditional two-bit system eats efficiency and bandwidth, compared to just computing with three-bits. I know "quantum computing" is attempting to do this but there's no real working model of it.

    Perhaps, in a decade that's where we will be at. Using lasers instead of silicon? Intel making a huge comeback? Or x86 becoming obsolete by another ISA? Who knows!
  • mode_13h - Wednesday, August 4, 2021 - link

    I can't speak to the feasibility of that, on an electrical level, though I wonder if various memory cells are equally adept at storing charges of either polarity.

    I've heard of ternary logic. I've even used 3-state variables in some code, going so far as to implement a full contingent of ternary logic operators. With that said, I would absolutely *hate* for computers to use 3-state bits. Binary simplifies soooo many things, in computing.

    Even if you implemented it and got real efficiency gains, there's like 50+ years' worth of software written with the assumption that binary operations are cheap. And the overhead of emulating binary on ternary logic would waste a lot of whatever you could hope to gain, in terms of base efficiency.
  • Kangal - Friday, August 6, 2021 - link

    Yes, that's exactly what I'm talking about.
    Building a brand-new computing mechanism using "trits" instead of "bits". And here's the kicker, this additional complexity will exponentially increase efficiency and performance. So emulating traditional Binary Computing can be done via software.

    And to demonstrate this concept, just think about DNA. It uses 4-digits (nucleotides) which is converted to amino acids, while there's quiet a few combinations, we only see 20 of them. And these blocks then make EVERY protein in the world. Just think about all the variations, from plants, minerals, microbes, animal cells, even spider's silk! So going from 2-bits to 3-bits is NOT a mere increase of +50%, but a stupidly higher order of complexity, especially when you combine it with a "tryte". So reading batches of trits/bits, for instance, a relatively simple 3^27 is about as complex as a computationally hard 2^64 (ie 64-bit instruction set). Or the "equivalent 64" for 2-bits when based on 3-powers is "81-trit".... and that 3^81 is complex is cryptographically stronger than 2^128 (a la 128-bit). So, yeah.

    As far as legacy code is concerned, who cares. Sometimes you have to burn the bush before you can grow forest. Case in point, moving from the "Apple III" to the "Macintosh" then to "Intel Mac" then phasing to "64bit Mac" and now "ARM Macs". That's 4-6 major architectural leaps over a 40-year period, or roughly, an update every SIX-to-TEN years.

    For the initial six years, or first-gen, a lot of the binary development code could be recycled. For instance, the iOS SDK can be quick-written for trits/trytes. And this will give a decent boost in efficiency and performance. But after a decade, when it enters the maturation stage or second-gen, that's when (for instance) the iOS SDK will be completely re-written from the ground up. And that would be using the hardware closer to its potential, giving a huge boost in both efficiency and performance. After that comes the plateau phase where novel techniques become discovered, and small victories in hardware and software, they eventually add up to further big boost.

    ...so yeah, that's where my head is at!
  • mode_13h - Saturday, August 7, 2021 - link

    > this additional complexity will exponentially increase efficiency and performance.

    Please justify this assertion. Not by analogy, either. Use maths.

    > And to demonstrate this concept, just think about DNA. It uses 4-digits (nucleotides)

    There are 4 bases, but they're organized in complementary pairs. That means there are only 2 base-pairs, but since I think the polarity is significant, you get 4 states. By my count, that makes it equivalent to a 2-bit quantity.

    > these blocks then make EVERY protein in the world.

    Binary bits represent ALL digital information in the world! What's your point?

    > So going from 2-bits to 3-bits

    You didn't propose 3 bits, you proposed 3 states. That equates to 1.5 bits. Consider that the number of combinations representable with 5 tri-state bits is 3^5 = 243. In binary, that takes the better part of 8 bits (2^8 = 256). So, your increase of information density is only 60% (if we disregard the extra 13 values 2^8 can represent).

    Now, aside from information density, there are further considerations. I already mentioned the electrical characteristics of the storage cells being one unknown, but the other is the complexity of logic gates needed to implement tri-state logic. We don't know how much larger or more complex they'd be. Finally, I'd worry that the amount of time needed for the signal to reliably settle into one of these states is longer or would require a higher voltage, both of which run contrary to performance scaling.

    > As far as legacy code is concerned, who cares.

    That's easy for you to say. Just to cite one example, the cost of writing something equivalent to the Linux kernel would run well into the $Billions. I don't want to get side-tracked on debating the merits of one source vs. another, but you can do your own search and I think you'll find data consistent with that. I pick on operating systems, since they're most sensitive to the differences between binary & 3-state, but that's not to say there's not a vast amount of userspace also impacted.

    > Case in point

    No, they're not. The closest examples would be their move from PowerPC to Intel, and then from Intel to ARM. Those are the only cases involving a truly modern OS. However, they didn't have to do a ground-up rewrite. All they had to do was port the stuff tied to the low-level CPU architecture, which tends to be somewhat compartmentalized and abstracted, in modern operating systems. Probably 95% of the OS code could simply be recompiled for the new ISA.

    What you're talking about is much more fundamental. If you look at everywhere OS and device driver code relies on a binary representation, it'd be a staggering amount. I'd guess probably on the order of 50% of the code would be affected. And adjusting it to work in 3-state logic could be non-trivial, in many cases.

    The last point I have to offer is that tri-state logic is hardly new. It has specialized applications, meaning there are people very familiar with it. If it made sense to use more broadly, I'd expect that would've already happened.

    https://en.wikipedia.org/wiki/Three-state_logic
  • callum.wright - Friday, August 6, 2021 - link

    Ever heard of the Dunning–Kruger effect mate? Because you're living it
  • mode_13h - Saturday, August 7, 2021 - link

    Well, yeah. But it's more fun & instructive to dismantle an ill conceived argument than simply attacking its proponent. We were all noobs at some point. At best, errors and mistakes represent learning opportunities.
  • The_Assimilator - Sunday, August 1, 2021 - link

    "The reason why PAM-3 is being used in this case is to achieve that higher bandwidth without the extra limitations that PAM-4 requires to be enabled."

    Limitations such as...?

    And this is quite honestly bizarre, why would Intel have a slide deck for something that's nowhere near release yet? Why would they have a printout of said slide stuck on their wall... do their own TB techs not know what they're working on?
  • Ian Cutress - Sunday, August 1, 2021 - link

    Executive doing a whirlwind tour, being shown the new technology, and each segment is being presented.
  • zdz - Sunday, August 1, 2021 - link

    Each higher order modulation type require more signal-to-noise ratio, to discern between signal levels. This means with higher modulation you need "better" cables, which are either thicker (unwieldy) or made of purer metals (more expensive).
  • Yojimbo - Sunday, August 1, 2021 - link

    Or you have shorter maximum cable lengths...
  • eastcoast_pete - Sunday, August 1, 2021 - link

    Good question: just how short are we talking about? Some of the "recommended lengths" seem to approach the size of a USB connector, so best given in mm, not cm or Inches.
  • Threska - Monday, August 2, 2021 - link

    Or go optical.
  • mode_13h - Tuesday, August 3, 2021 - link

    The last time this came up, I seem to recall some knowledgeable posters made a compelling case that such a high-bandwidth optical cable wouldn't be very consumer-friendly.
  • Murloc - Sunday, August 1, 2021 - link

    the more levels you want to recognize and be sure about it (despite noise and ringing), the harder it is.
  • ryrynz - Monday, August 2, 2021 - link

    I'll tell you right now the first and main reason is cost, it nearly always is 😛
  • ishould - Sunday, August 1, 2021 - link

    If it's only 1.5 bits/cycle how did they double the bandwidth? Frequency increase alongside PAM3?
  • Ian Cutress - Sunday, August 1, 2021 - link

    Likely.
  • FunBunny2 - Sunday, August 1, 2021 - link

    Amusing. PAM is the compute analog to AM radio? reduced to right wing jabber, and all the good data on FM?

    seriously: why amplitude modulation when we know (don't we?) that it's the inferior carrier?
  • Leeea - Sunday, August 1, 2021 - link

    Something tells me smart engineers with far more education and experience then you or I have carefully come up with this design.
  • Dolda2000 - Sunday, August 1, 2021 - link

    Radio AM and PAM are completely different things. Just check Wikipedia.
  • faydrus - Monday, August 2, 2021 - link

    Encoding information via the amplitude isn't inherently inferior -- Wi-Fi, LTE, 5G, etc. use both amplitude and phase to encode information (QAM) within each of their numerous subchannels (OFDM).

    The main advantage of FM vs. AM is that FM is more interference-resistant. Single sideband (a type of amplitude modulation) is still advantageous in weak signal circumstances, and tends to be more spectrally efficient vs. FM.
  • lightningz71 - Sunday, August 1, 2021 - link

    It's all about signal states. If you can combine "amplitude modulation" with "frequency modulation" and manage to define multiple "zones" that represent the combination of, let's say high amplitude and fast modulation, high amplitude and slow modulation, low amplitude and fast modulation, and finally low amplitude and slow modulation, you have four distinct "zones" per clock to carry information, giving you two total bits per cycle. What you then need is circuits that can detect what zone the signal is at each given clock cycle, and can do it fast enough to run at a high signaling rate.

    You can then refine this to have more states per modulation and amplitude, similar to the way you can have many different voltages in a NAND cell such as in a QLC cell. You can have four detectable frequencies and four detectable areas of amplitude to give 16 different possible combinations for four bits of data per clock cycle.

    However, with the more and tighter ranges, the more chances of data errors there are. You can solve that by including parity bits, CEC checks, and, using complex encoding with rotating bit ranges (look up how the physical layer of Ethernet works).

    This is ALL a GROSS oversimplification of how it works, but it gives you the fundamental idea.
  • FunBunny2 - Monday, August 2, 2021 - link

    "This is ALL a GROSS oversimplification"

    useful, nevertheless. thx.
  • minde - Sunday, August 1, 2021 - link

    thunderbolt 5 . With pcie4? its good for 8k 60p video. on intel 7nm or 7nm+ 2023-2025?
  • Ian Cutress - Sunday, August 1, 2021 - link

    You mean Intel 4 and Intel 3
  • minde - Sunday, August 1, 2021 - link

    yes. on 7nm on Xe GPU up to 192 EUs
  • DigitalFreak - Monday, August 2, 2021 - link

    It's sad to see that you've so readily bought into that Intel marketing BS.
  • A5 - Monday, August 2, 2021 - link

    All process node names have been marketing BS for at least a decade. If you think there are meaningful feature size differences between (for ex) Samsung 8LP 7HFP 6LPP or whatever, you'd be wrong.
  • dotjaz - Monday, August 2, 2021 - link

    It's sad you bought into mere names in rhe first place.
  • mode_13h - Tuesday, August 3, 2021 - link

    It's sad you bought into buying into things!
    ; )
  • mode_13h - Tuesday, August 3, 2021 - link

    Why do you think that? He specifically lobbied them for it!

    The fact is that we really don't have good data on the real feature size or density of their latest 10 nm iterations. So, there's nothing else you *can* call it that's necessarily accurate.
  • eastcoast_pete - Sunday, August 1, 2021 - link

    And this is why, at least not too long ago, anything with a camera or recording function had to be deposited into a closed, RF-shielded box before entering such facilities. Nowadays, of course, people (and companies) are so eager to spill such information that any resemblance of a trade secret is almost absurd. Especially if someone very high up wants to be visible on social media.
  • mode_13h - Monday, August 2, 2021 - link

    But he's an exec, so who is going to demand he surrender (or lock down) his phone?
  • lemurbutton - Sunday, August 1, 2021 - link

    It will be interesting to see if Apple will adopt Thunderbolt 5 or will it create a new standard.
  • mode_13h - Monday, August 2, 2021 - link

    Won't they want a standard that works with all of people's existing peripherals? In that case, upgrading to TB5 makes plenty of sense.
  • sor - Monday, August 2, 2021 - link

    Yeah I’d hope they learned their lesson from FireWire. A peripheral connection needs peripherals to work with your connection. Convincing others to use a different connector or protocol isn’t easy unless there are clear benefits.

    The lightning connector on phones is different. It wasn’t intended to do much more than charge and connect your phone to your computer for backups and whatnot. The ecosystem of accessories just sprung up around the popularity of the phone.
  • FunBunny2 - Monday, August 2, 2021 - link

    "Won't they want a standard that works with all of people's existing peripherals?"

    deja vu, all over again. the IBM/PC was loaded with OTS 8-bit peripherals and the, thus compatible, 8088 for just that reason. then along comes Compaq with an early (first? too long ago to find the data in my lower brain stem) clone which would only accept Compaq stuff. blew off both feet.
  • mode_13h - Tuesday, August 3, 2021 - link

    Oh, well... if someone did something similar like 40 years ago and it didn't work out... WTF?
  • WaltC - Monday, August 2, 2021 - link

    Apple doesn't remotely care about hardware and software compatibility, imo. I'm looking forward to Apple's next CPU transition, myself--always entertaining to watch...;)
  • mode_13h - Tuesday, August 3, 2021 - link

    Yeah, I mean just forget about Rosetta, right?
  • sor - Monday, August 2, 2021 - link

    I mean anything is possible, but they’ve already adopted thunderbolt for the M1 laptops and iPads, Apple and Intel have co-developer thunderbolt from the beginning, and it’s a royalty free standard. It would be pretty wild for them to suddenly change their minds now.
  • zhang297 - Monday, August 2, 2021 - link

    PAM3 can carry more than 1.5 bit info per clock if longer encoding sequences are used.
  • TomWomack - Monday, August 2, 2021 - link

    But not very much more - you can't get 1.6 - and 'seven trits to send eleven bits' or 'twelve trits to send nineteen bits' don't fit well with the tendency of bits to come in powers of two.
  • 5j3rul3 - Monday, August 2, 2021 - link

    PCIe 5.0 X2 ?
    Hope Thunderbolt 5 can run as PCIe 5.0 X4 + PD 240W + DP2.0
  • mode_13h - Tuesday, August 3, 2021 - link

    That might depend on how short, inflexible, and expensive you want the cables to be.

    Not to mention the cost of devices supporting it.
  • vladx - Sunday, August 8, 2021 - link

    Yeah, there's no coincidence that both Thunderbolt 5 and Displayport 2.0 have the same bandwidth. It's either intended or Displayport forced their hand.
  • Wuety06 - Monday, August 2, 2021 - link

    So is this basically a new play on differential signaling where you create a 3rd state and hope u can still filter the noise or am I missing something here?
  • mode_13h - Monday, August 2, 2021 - link

    Curious what the maximum length & cost will be, for a passive TB5 cable @ full bandwidth.
  • yeeeeman - Monday, August 2, 2021 - link

    well, i guess now they should just do the right thing and announce TB5 and meteor lake.
  • AnTech - Monday, August 2, 2021 - link

    We have been fooled by Intel too many times now (products that do not deliver to promises like Optane Xpoint, microprocessors delayed for ever, etc). It is just smoke to increase share prices.
  • WaltC - Monday, August 2, 2021 - link

    Yes--nothing matters except the products you can ship--shipping products are the best PR any company can have. It's exactly why Intel is sucking hind teat atm...;)
  • Wereweeb - Monday, August 2, 2021 - link

    Good to see that there is still progress being made here.

    But does anyone know what is the barrier to making optical interconnects cheaper? Why is it so expensive to make optical silicon? Patents? Defect rates? Limited competition in manufacturing?
  • A5 - Monday, August 2, 2021 - link

    Electrical->Optical->Electrical conversion is hard to do and expensive in small form factors. No one is going to make a laptop with an SFP cage on it, for example.
  • Threska - Monday, August 2, 2021 - link

    Durability in the face of repeated insertions and removals.
  • mode_13h - Tuesday, August 3, 2021 - link

    There's also dirt and dust to contend with.
  • Wereweeb - Tuesday, August 3, 2021 - link

    No dirt and dust will get within a sealed Thunderbolt optical cable package, and manufacturing facilities are used to having clean rooms anyway to reduce electrostatic damage.
  • mode_13h - Wednesday, August 4, 2021 - link

    If we're talking about cables, you have to consider susceptibility to dirt and wear on both the connector and the socket.
  • Oxford Guy - Thursday, August 12, 2021 - link

    The designers of the Fairchild VES were very concerned about the delicacy of circuit boards, so a well-engineered ZIF was designed and deployed.

    Atari’s VCS engineers went in the opposite direction. Bare circuit boards sticking out of cartridges, cartridges that one forced into the machine and pulled out with force.

    Guess which machine was the market success?

    Then, there is the utterly odious market success example of the failure of ‘console’ makers to go the DVD-RAM route of producing protected media.

    The megacorps involved were far more interested in protecting their IP, via DRM and broken promises (Linux on PS3) than in providing a reliable experience. Root kits. Capacitors that failed due to defective design. RRoD. And so on.

    Apple refused to replace the defective GeForce boards in MacBook Pro machines (lead-free solder done incorrectly). Instead, the company would replace one board with another of identically-defective design.

    I can continue but reliability for consumers is given short shrift, as it does not feed both planned obsolescence (the thing that really turns tech corporations on) and the speeding of of that.

    Really... too... I can’t not mention the wonderful Zip drive.

    That there are too many examples of grossly substandard design is one problem. That companies get away with placing most of the burden onto consumers is worse.
  • mode_13h - Friday, August 13, 2021 - link

    Those are all examples of individual companies selling flawed products. For a new cable standard, you'll need a whole consortium of players to buy into this mentality, which seems like more of a reach.

    And since a lot of device makers aren't in the cable business, they don't want bad/dirty cables causing support calls and returned products. They want cables that "just work".
  • mode_13h - Tuesday, August 3, 2021 - link

    And don't forget about the fragility and cost of high-bandwidth optical cables.
  • Wereweeb - Tuesday, August 3, 2021 - link

    Cables are cheap and there are plastic ones available that are pretty good for short distances. The problem is the silicon and package.
  • mode_13h - Wednesday, August 4, 2021 - link

    Where can I get a plastic cable that can handle 100 Gbps? How much does it cost? What's its maximum length? What's its bending radius?
  • msewing - Monday, August 2, 2021 - link

    The "USB-C ecosystem"? I have a vision of my desktop and cell phones, with their USB-C cables that fall out when handled. Really, can't we have a mechanically reliable connector? Maybe one with a detent that goes "click". It's not rocket science.
  • supdawgwtfd - Monday, August 2, 2021 - link

    Maybe be a little more gentle with your devices?

    My cables don't just "fall out".

    They are far more resilient to coming out compared to previous USB stuff.
  • mode_13h - Tuesday, August 3, 2021 - link

    I bought a wireless charging stand, for this very reason. I was worried about plugging/unplugging my phone's USB-C connector so many times/day.

    The stand I got was a somewhat ugly and expensive Samsung, but I've had absolutely zero problems with it. There were too many bad reviews of cheaper stands for me to feel comfortable using them.
  • mode_13h - Tuesday, August 3, 2021 - link

    > Really, can't we have a mechanically reliable connector?
    > Maybe one with a detent that goes "click". It's not rocket science.

    DisplayPort connectors have a latch that some cables utilize. They latch so well that if you don't see the button, it seems like you could damage the cable or connector by pulling it with enough brute force!
  • Kevin G - Tuesday, August 3, 2021 - link

    I wonder how this will be exposed on the system level for encapsulation purposes. Obviously PCIe doesn't support PAM3 for its own signaling so the transceivers will have to do some signal conversion. I do wonder if a TB5 controller would be exposed as a 4 lane PCIe 4.0 or 2 lane PCIe 5.0 device in a system. The bandwidth is the same but there is the nuance of how many internal queues are used to encapsulate PCIe packets.

    Presumably a single lane of PCIe 6.0 would suffice for the bandwidth but you have the PAM4 to PAM3 conversion. I have a feeling that the timings may not work out well given the buffering and handling of error correction on a PCIe 6.0 link.
  • supdawgwtfd - Tuesday, August 3, 2021 - link

    Why would you even bother deleting the original post...

    It's to late. It's out there. You can't get rid of it now.

    Just own it FFS.
  • mode_13h - Wednesday, August 4, 2021 - link

    Why *not* delete it? He might not have been aware of how widely it spread, and deleting it could've kept it from being spread even *more* widely. Even if it might not help, it still couldn't hurt.
  • mode_13h - Wednesday, August 4, 2021 - link

    > Just own it FFS.

    Maybe those specs weren't final, which would be a good reason not to announce them.

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